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<div class="header">
  <div class="summary">
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle"><div class="title">channel_config<div class="ingroups"><a class="el" href="group__hardware.html">Hardware APIs</a> &raquo; <a class="el" href="group__hardware__dma.html">hardware_dma</a></div></div></div>
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<p>DMA channel configuration.  
<a href="#details">More...</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga28d1103cea7f7d73406a2aee44bfebd9"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga28d1103cea7f7d73406a2aee44bfebd9">channel_config_set_read_increment</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool incr)</td></tr>
<tr class="memdesc:ga28d1103cea7f7d73406a2aee44bfebd9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set DMA channel read increment in a channel configuration object.  <a href="group__channel__config.html#ga28d1103cea7f7d73406a2aee44bfebd9">More...</a><br /></td></tr>
<tr class="separator:ga28d1103cea7f7d73406a2aee44bfebd9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga864c9d35a39c315f2972b7272f860e9e"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga864c9d35a39c315f2972b7272f860e9e">channel_config_set_write_increment</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool incr)</td></tr>
<tr class="memdesc:ga864c9d35a39c315f2972b7272f860e9e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set DMA channel write increment in a channel configuration object.  <a href="group__channel__config.html#ga864c9d35a39c315f2972b7272f860e9e">More...</a><br /></td></tr>
<tr class="separator:ga864c9d35a39c315f2972b7272f860e9e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7c5a515cf1cfc6a8889464250b1e375b"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga7c5a515cf1cfc6a8889464250b1e375b">channel_config_set_dreq</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, uint dreq)</td></tr>
<tr class="memdesc:ga7c5a515cf1cfc6a8889464250b1e375b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select a transfer request signal in a channel configuration object.  <a href="group__channel__config.html#ga7c5a515cf1cfc6a8889464250b1e375b">More...</a><br /></td></tr>
<tr class="separator:ga7c5a515cf1cfc6a8889464250b1e375b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7df3433a59311b83289490586f1242c8"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga7df3433a59311b83289490586f1242c8">channel_config_set_chain_to</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, uint chain_to)</td></tr>
<tr class="memdesc:ga7df3433a59311b83289490586f1242c8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set DMA channel chain_to channel in a channel configuration object.  <a href="group__channel__config.html#ga7df3433a59311b83289490586f1242c8">More...</a><br /></td></tr>
<tr class="separator:ga7df3433a59311b83289490586f1242c8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad1a02fcee90d21f133460006b025bac0"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#gad1a02fcee90d21f133460006b025bac0">channel_config_set_transfer_data_size</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, enum <a class="el" href="group__hardware__dma.html#gaccecdff367b06a019373e9a55d4f3e01">dma_channel_transfer_size</a> size)</td></tr>
<tr class="memdesc:gad1a02fcee90d21f133460006b025bac0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the size of each DMA bus transfer in a channel configuration object.  <a href="group__channel__config.html#gad1a02fcee90d21f133460006b025bac0">More...</a><br /></td></tr>
<tr class="separator:gad1a02fcee90d21f133460006b025bac0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadd7ee73f3652261ae5e195b709cc6dc0"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#gadd7ee73f3652261ae5e195b709cc6dc0">channel_config_set_ring</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool write, uint size_bits)</td></tr>
<tr class="memdesc:gadd7ee73f3652261ae5e195b709cc6dc0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set address wrapping parameters in a channel configuration object.  <a href="group__channel__config.html#gadd7ee73f3652261ae5e195b709cc6dc0">More...</a><br /></td></tr>
<tr class="separator:gadd7ee73f3652261ae5e195b709cc6dc0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga43c3a2dd43fe7e962b1de0e90a46bb9e"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga43c3a2dd43fe7e962b1de0e90a46bb9e">channel_config_set_bswap</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool bswap)</td></tr>
<tr class="memdesc:ga43c3a2dd43fe7e962b1de0e90a46bb9e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set DMA byte swapping config in a channel configuration object.  <a href="group__channel__config.html#ga43c3a2dd43fe7e962b1de0e90a46bb9e">More...</a><br /></td></tr>
<tr class="separator:ga43c3a2dd43fe7e962b1de0e90a46bb9e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8ccbf80d437f895f95ad0531197dcaab"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga8ccbf80d437f895f95ad0531197dcaab">channel_config_set_irq_quiet</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool irq_quiet)</td></tr>
<tr class="memdesc:ga8ccbf80d437f895f95ad0531197dcaab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set IRQ quiet mode in a channel configuration object.  <a href="group__channel__config.html#ga8ccbf80d437f895f95ad0531197dcaab">More...</a><br /></td></tr>
<tr class="separator:ga8ccbf80d437f895f95ad0531197dcaab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1acca0d1b5a1793c78dc0daec8a5fffc"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga1acca0d1b5a1793c78dc0daec8a5fffc">channel_config_set_high_priority</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool high_priority)</td></tr>
<tr class="memdesc:ga1acca0d1b5a1793c78dc0daec8a5fffc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the channel priority in a channel configuration object.  <a href="group__channel__config.html#ga1acca0d1b5a1793c78dc0daec8a5fffc">More...</a><br /></td></tr>
<tr class="separator:ga1acca0d1b5a1793c78dc0daec8a5fffc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab8f61e99408c4440866af231f947a7b9"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#gab8f61e99408c4440866af231f947a7b9">channel_config_set_enable</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool enable)</td></tr>
<tr class="memdesc:gab8f61e99408c4440866af231f947a7b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable/Disable the DMA channel in a channel configuration object.  <a href="group__channel__config.html#gab8f61e99408c4440866af231f947a7b9">More...</a><br /></td></tr>
<tr class="separator:gab8f61e99408c4440866af231f947a7b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5eb02f42a33115052031d0b457fa2674"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga5eb02f42a33115052031d0b457fa2674">channel_config_set_sniff_enable</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool sniff_enable)</td></tr>
<tr class="memdesc:ga5eb02f42a33115052031d0b457fa2674"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable access to channel by sniff hardware in a channel configuration object.  <a href="group__channel__config.html#ga5eb02f42a33115052031d0b457fa2674">More...</a><br /></td></tr>
<tr class="separator:ga5eb02f42a33115052031d0b457fa2674"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga432f0d010da5935d333c27fbce0135f8"><td class="memItemLeft" align="right" valign="top">static <a class="el" href="structdma__channel__config.html">dma_channel_config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga432f0d010da5935d333c27fbce0135f8">dma_channel_get_default_config</a> (uint channel)</td></tr>
<tr class="memdesc:ga432f0d010da5935d333c27fbce0135f8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the default channel configuration for a given channel.  <a href="group__channel__config.html#ga432f0d010da5935d333c27fbce0135f8">More...</a><br /></td></tr>
<tr class="separator:ga432f0d010da5935d333c27fbce0135f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga369ee3104c5a9b5a32673c163a499a1d"><td class="memItemLeft" align="right" valign="top">static <a class="el" href="structdma__channel__config.html">dma_channel_config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga369ee3104c5a9b5a32673c163a499a1d">dma_get_channel_config</a> (uint channel)</td></tr>
<tr class="memdesc:ga369ee3104c5a9b5a32673c163a499a1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the current configuration for the specified channel.  <a href="group__channel__config.html#ga369ee3104c5a9b5a32673c163a499a1d">More...</a><br /></td></tr>
<tr class="separator:ga369ee3104c5a9b5a32673c163a499a1d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7f379a63d28a2565ff9a433cb8d31c90"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga7f379a63d28a2565ff9a433cb8d31c90">channel_config_get_ctrl_value</a> (const <a class="el" href="structdma__channel__config.html">dma_channel_config</a> *config)</td></tr>
<tr class="memdesc:ga7f379a63d28a2565ff9a433cb8d31c90"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the raw configuration register from a channel configuration.  <a href="group__channel__config.html#ga7f379a63d28a2565ff9a433cb8d31c90">More...</a><br /></td></tr>
<tr class="separator:ga7f379a63d28a2565ff9a433cb8d31c90"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<p >DMA channel configuration. </p>
<p >A DMA channel needs to be configured, these functions provide handy helpers to set up configuration structures. See <a class="el" href="structdma__channel__config.html">dma_channel_config</a> </p>
<h2 class="groupheader">Function Documentation</h2>
<a id="ga7f379a63d28a2565ff9a433cb8d31c90" name="ga7f379a63d28a2565ff9a433cb8d31c90"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7f379a63d28a2565ff9a433cb8d31c90">&#9670;&nbsp;</a></span>channel_config_get_ctrl_value()</h2>

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          <td class="memname">static uint32_t channel_config_get_ctrl_value </td>
          <td>(</td>
          <td class="paramtype">const <a class="el" href="structdma__channel__config.html">dma_channel_config</a> *&#160;</td>
          <td class="paramname"><em>config</em></td><td>)</td>
          <td></td>
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<p>Get the raw configuration register from a channel configuration. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">config</td><td>Pointer to a config structure. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Register content </dd></dl>

</div>
</div>
<a id="ga43c3a2dd43fe7e962b1de0e90a46bb9e" name="ga43c3a2dd43fe7e962b1de0e90a46bb9e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga43c3a2dd43fe7e962b1de0e90a46bb9e">&#9670;&nbsp;</a></span>channel_config_set_bswap()</h2>

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          <td class="memname">static void channel_config_set_bswap </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="structdma__channel__config.html">dma_channel_config</a> *&#160;</td>
          <td class="paramname"><em>c</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>bswap</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Set DMA byte swapping config in a channel configuration object. </p>
<p >No effect for byte data, for halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse their order.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">c</td><td>Pointer to channel configuration object </td></tr>
    <tr><td class="paramname">bswap</td><td>True to enable byte swapping </td></tr>
  </table>
  </dd>
</dl>

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</div>
<a id="ga7df3433a59311b83289490586f1242c8" name="ga7df3433a59311b83289490586f1242c8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7df3433a59311b83289490586f1242c8">&#9670;&nbsp;</a></span>channel_config_set_chain_to()</h2>

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          <td class="memname">static void channel_config_set_chain_to </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="structdma__channel__config.html">dma_channel_config</a> *&#160;</td>
          <td class="paramname"><em>c</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>chain_to</em>&#160;</td>
        </tr>
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          <td></td>
          <td>)</td>
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<p>Set DMA channel chain_to channel in a channel configuration object. </p>
<p >When this channel completes, it will trigger the channel indicated by chain_to. Disable by setting chain_to to itself (the same channel)</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">c</td><td>Pointer to channel configuration object </td></tr>
    <tr><td class="paramname">chain_to</td><td>Channel to trigger when this channel completes. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga7c5a515cf1cfc6a8889464250b1e375b">&#9670;&nbsp;</a></span>channel_config_set_dreq()</h2>

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          <td class="memname">static void channel_config_set_dreq </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="structdma__channel__config.html">dma_channel_config</a> *&#160;</td>
          <td class="paramname"><em>c</em>, </td>
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          <td class="paramname"><em>dreq</em>&#160;</td>
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<p>Select a transfer request signal in a channel configuration object. </p>
<p >The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system). 0x0 to 0x3a -&gt; select DREQ n as TREQ 0x3b -&gt; Select Timer 0 as TREQ 0x3c -&gt; Select Timer 1 as TREQ 0x3d -&gt; Select Timer 2 as TREQ (Optional) 0x3e -&gt; Select Timer 3 as TREQ (Optional) 0x3f -&gt; Permanent request, for unpaced transfers.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">c</td><td>Pointer to channel configuration data </td></tr>
    <tr><td class="paramname">dreq</td><td>Source (see description) </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gab8f61e99408c4440866af231f947a7b9">&#9670;&nbsp;</a></span>channel_config_set_enable()</h2>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="structdma__channel__config.html">dma_channel_config</a> *&#160;</td>
          <td class="paramname"><em>c</em>, </td>
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          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
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<p>Enable/Disable the DMA channel in a channel configuration object. </p>
<p >When false, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">c</td><td>Pointer to channel configuration object </td></tr>
    <tr><td class="paramname">enable</td><td>True to enable the DMA channel. When enabled, the channel will respond to triggering events, and start transferring data. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga1acca0d1b5a1793c78dc0daec8a5fffc">&#9670;&nbsp;</a></span>channel_config_set_high_priority()</h2>

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          <td>(</td>
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          <td class="paramname"><em>c</em>, </td>
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<p>Set the channel priority in a channel configuration object. </p>
<p >When true, gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.</p>
<p >This only affects the order in which the DMA schedules channels. The DMA's bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">c</td><td>Pointer to channel configuration object </td></tr>
    <tr><td class="paramname">high_priority</td><td>True to enable high priority </td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#ga8ccbf80d437f895f95ad0531197dcaab">&#9670;&nbsp;</a></span>channel_config_set_irq_quiet()</h2>

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<p>Set IRQ quiet mode in a channel configuration object. </p>
<p >In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">c</td><td>Pointer to channel configuration object </td></tr>
    <tr><td class="paramname">irq_quiet</td><td>True to enable quiet mode, false to disable. </td></tr>
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  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga28d1103cea7f7d73406a2aee44bfebd9">&#9670;&nbsp;</a></span>channel_config_set_read_increment()</h2>

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          <td class="paramname"><em>incr</em>&#160;</td>
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<p>Set DMA channel read increment in a channel configuration object. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">c</td><td>Pointer to channel configuration object </td></tr>
    <tr><td class="paramname">incr</td><td>True to enable read address increments, if false, each read will be from the same address Usually disabled for peripheral to memory transfers </td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#gadd7ee73f3652261ae5e195b709cc6dc0">&#9670;&nbsp;</a></span>channel_config_set_ring()</h2>

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          <td class="paramname"><em>c</em>, </td>
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          <td class="paramname"><em>write</em>, </td>
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          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>size_bits</em>&#160;</td>
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<p>Set address wrapping parameters in a channel configuration object. </p>
<p >Size of address wrap region. If 0, don’t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers. Ring sizes between 2 and 32768 bytes are possible (size_bits from 1 - 15)</p>
<p >0x0 -&gt; No wrapping.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">c</td><td>Pointer to channel configuration object </td></tr>
    <tr><td class="paramname">write</td><td>True to apply to write addresses, false to apply to read addresses </td></tr>
    <tr><td class="paramname">size_bits</td><td>0 to disable wrapping. Otherwise the size in bits of the changing part of the address. Effectively wraps the address on a (1 &lt;&lt; size_bits) byte boundary. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga5eb02f42a33115052031d0b457fa2674">&#9670;&nbsp;</a></span>channel_config_set_sniff_enable()</h2>

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          <td class="paramtype"><a class="el" href="structdma__channel__config.html">dma_channel_config</a> *&#160;</td>
          <td class="paramname"><em>c</em>, </td>
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          <td class="paramname"><em>sniff_enable</em>&#160;</td>
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<p>Enable access to channel by sniff hardware in a channel configuration object. </p>
<p >Sniff HW must be enabled and have this channel selected.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">c</td><td>Pointer to channel configuration object </td></tr>
    <tr><td class="paramname">sniff_enable</td><td>True to enable the Sniff HW access to this DMA channel. </td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#gad1a02fcee90d21f133460006b025bac0">&#9670;&nbsp;</a></span>channel_config_set_transfer_data_size()</h2>

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          <td class="paramtype"><a class="el" href="structdma__channel__config.html">dma_channel_config</a> *&#160;</td>
          <td class="paramname"><em>c</em>, </td>
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          <td class="paramname"><em>size</em>&#160;</td>
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<p>Set the size of each DMA bus transfer in a channel configuration object. </p>
<p >Set the size of each bus transfer (byte/halfword/word). The read and write addresses advance by the specific amount (1/2/4 bytes) with each transfer.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">c</td><td>Pointer to channel configuration object </td></tr>
    <tr><td class="paramname">size</td><td>See enum for possible values. </td></tr>
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  </dd>
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<h2 class="memtitle"><span class="permalink"><a href="#ga864c9d35a39c315f2972b7272f860e9e">&#9670;&nbsp;</a></span>channel_config_set_write_increment()</h2>

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          <td class="paramname"><em>c</em>, </td>
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<p>Set DMA channel write increment in a channel configuration object. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">c</td><td>Pointer to channel configuration object </td></tr>
    <tr><td class="paramname">incr</td><td>True to enable write address increments, if false, each write will be to the same address Usually disabled for memory to peripheral transfers </td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#ga432f0d010da5935d333c27fbce0135f8">&#9670;&nbsp;</a></span>dma_channel_get_default_config()</h2>

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          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em></td><td>)</td>
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<p>Get the default channel configuration for a given channel. </p>
<table class="markdownTable">
<tr class="markdownTableHead">
<th class="markdownTableHeadNone">Setting   </th><th class="markdownTableHeadNone">Default    </th></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">Read Increment   </td><td class="markdownTableBodyNone">true    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">Write Increment   </td><td class="markdownTableBodyNone">false    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">DReq   </td><td class="markdownTableBodyNone">DREQ_FORCE    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">Chain to   </td><td class="markdownTableBodyNone">self    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">Data size   </td><td class="markdownTableBodyNone">DMA_SIZE_32    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">Ring   </td><td class="markdownTableBodyNone">write=false, size=0 (i.e. off)    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">Byte Swap   </td><td class="markdownTableBodyNone">false    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">Quiet IRQs   </td><td class="markdownTableBodyNone">false    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">High Priority   </td><td class="markdownTableBodyNone">false    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">Channel Enable   </td><td class="markdownTableBodyNone">true    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">Sniff Enable   </td><td class="markdownTableBodyNone">false   </td></tr>
</table>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>the default configuration which can then be modified. </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga369ee3104c5a9b5a32673c163a499a1d">&#9670;&nbsp;</a></span>dma_get_channel_config()</h2>

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          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em></td><td>)</td>
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<p>Get the current configuration for the specified channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The current configuration as read from the HW register (not cached) </dd></dl>

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